Intel’s 7nm Process, EUV Injection Still on Track
In the wake of Intel’s 10nm delay(s), it makes sense to wonder what this means for the company’s 7nm node. We’ve seen reports that Intel has canceled its 10nm node altogether, with strong pushback from the company on those rumors. At the same time, it’s true that there’s typically a progression to these things, with new nodes only arriving a few years after each other. At the 39th Nasdaq Investors Conference, Murthy Renduchintala, Intel’s CEO and group president, spoke and shared details both on what went wrong with 10nm and the company’s roadmap to 7nm.
According to Renduchintala, the problems with 10nm are directly related to the fact that Intel chose not to introduce EUV at that node, but instead pushed for an incredibly aggressive 2.7x scaling factor. The problem with doing this on DUV lithography (deep ultraviolet) is that it requires you to use multi-patterning, and multi-patterning doesn’t create feature sizes as sharp or defined as EUV does. The image below shows the difference between using EUV and ArF lasers, with the intended floor plan at the top.
Interestingly, one of the rumors about Intel’s 10nm is that the company would hit its targets by relaxing them, introducing a new process more akin to “12nm” than 10nm — though we have to note that since node names are basically named by marketing departments, the distinction between 12nm and 10nm is anything Intel wants it to be. Semiconductor companies could start naming nodes after cheese and capture the same intrinsic improvements as the numbers stand for these days. But according to Renduchintala, this isn’t the route that Intel took.
“The ambitions for 10 haven’t changed,” Renduchintala said. “I mean even though we have had the trials and tribulations with 10, the power and performance and transistor density targets that we set in 2014 remain the same,”
The interesting point that Renduchintala makes is that 7nm has apparently been developed by an entirely different team at Intel than 10nm, and has apparently moved along a parallel development track.
I think that we have taken a lot of lessons out of the 10-nanometer experience as we defined that and defined a different optimization point between transistor density, power and performance and schedule predictability.
So, we are going back to more like a 2x scaling factor when we get back to 7 and then really moving forward with that goal. So we are very, very focused on getting 7 out according to our original internal plans.
One thing I will say is that as you look at 7-nanometer, for us this is really now a point in time where we will get EUV back into the manufacturing matrix, and therefore, I think, that will give us a degree of back to the traditional Moore’s Law cadence that we were really talking about. 14 and 10 were really about double patterning and quad patterning in the absence of EUV.
The implication of all this is that 7nm for Intel may follow 10nm relatively quickly, though the company has specifically committed to shipping server parts on 10nm alongside client hardware. This implies that what we’d typically call 10nm may, in fact, appear as more of a “10nm+” product, though Intel isn’t using that nomenclature any longer. The original 10nm projections, however, showed 14nm+ and 10nm existing side-by-side, with the former used for desktop and servers and the latter for mobile. The long delay means that we’ve already been through multiple 14nm generations, which breaks the original comparison.
At the same time, Intel didn’t expect its first-generation 10nm process node to be particularly good for servers. The implication here is that 10nm will be relatively short-lived before Intel moves on to 7nm, but the company isn’t revealing exact timelines yet beyond the ones its already given — namely that 10nm hardware will be on shelves by Q4 2019, with server parts shipping thereafter.
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